2️⃣ The second task is named “SiC-based #powerelectronics submodules”. This will be a key component for the realization of the entire MoReSiC – Project. This basic unit will provide the opportunity to implement the main assumptions of the system: #modular construction and easy #reconfigurability.
❗ The main objective of this task is to conduct research aiming in development of a highly-optimized multilevel submodule with 1.2kV rated SiC power devices. The submodule will contain four switches with #SiCMOSFET and #Schottkydiodes, DC capacitors, gate drivers and air-forced cooling system.
📑 The developed unit should work up to maximum DC side voltage of 800 V and RMS currents up to 30 A. All junction temperatures will be kept below 100 °C by suitable cooling and control system. Gate drivers are expected to provide typical protection functions: overcurrent & overtemperature protection as well as gate supply monitoring and the generation of dead-times. Finally, isolation between the submodule and control system above 3.4 kV (50Hz, 1 minute test).
The task will be conducted by Markel team supported by Politechnika Warszawska PhD student. The task will be managed by Radosław Sobieski, who is head of Markel’s R&D department.